#![cfg_attr(docsrs, procmacros::doc_replace(

    "freq" => {

        cfg(esp32h2) => "32",

        _ => "80"

    },

    "channel" => {

        cfg(any(esp32, esp32s2)) => "channel0",

        cfg(any(esp32s3, esp32s31, esp32p4)) => "channel7",

        _ => "channel2"

    },

    "channels_desc" => {

        cfg(esp32) => "8 channels, each of them can be either receiver or transmitter",

        cfg(esp32s2) => "4 channels, each of them can be either receiver or transmitter",

        cfg(any(esp32s3, esp32s31, esp32p4)) => "8 channels, `Channel<0>`-`Channel<3>` hardcoded for transmitting signals and `Channel<4>`-`Channel<7>` hardcoded for receiving signals",

        cfg(any(esp32c3, esp32c5, esp32c6, esp32h2)) => "4 channels, `Channel<0>` and `Channel<1>` hardcoded for transmitting signals and `Channel<2>` and `Channel<3>` hardcoded for receiving signals",

    }

))]

//! # Remote Control Peripheral (RMT)

//!

//! ## Overview

//! The RMT (Remote Control) module is designed to send and receive infrared

//! remote control signals. A variety of remote control protocols can be

//! encoded/decoded via software based on the RMT module. The RMT module

//! converts pulse codes stored in the module’s built-in RAM into output

//! signals, or converts input signals into pulse codes and stores them in RAM.

//! In addition, the RMT module optionally modulates its output signals with a

//! carrier wave, or optionally demodulates and filters its input signals.

//!

//! Typically, the RMT peripheral can be used in the following scenarios:

//! - Transmit or receive infrared signals, with any IR protocols, e.g., NEC

//! - General-purpose sequence generator

//! - Transmit signals in a hardware-controlled loop, with a finite or infinite number of times

//! - Modulate the carrier to the output signal or demodulate the carrier from the input signal

//!

//! ### Channels

//!

//! There are __channels_desc__.

//!

//! For more information, please refer to the

#![doc = concat!("[ESP-IDF documentation](https://docs.espressif.com/projects/esp-idf/en/latest/", chip!(), "/api-reference/peripherals/rmt.html)")]

//! ## Configuration

//! Each TX/RX channel has the same functionality controlled by a dedicated set

//! of registers and is able to independently transmit or receive data. TX

//! channels are indicated by n which is used as a placeholder for the channel

//! number, and by m for RX channels.

//!

//! ## Examples

//!

//! ### Initialization

//!

//! ```rust, no_run

//! # {before_snippet}

//! # use esp_hal::gpio::Level;

//! # use esp_hal::peripherals::Peripherals;

//! # use esp_hal::rmt::TxChannelConfig;

//! # use esp_hal::rmt::Rmt;

//! # use crate::esp_hal::rmt::TxChannelCreator;

//! let rmt = Rmt::new(peripherals.RMT, Rate::from_mhz(__freq__))?;

//! let mut channel = rmt

//!     .channel0

//!     .configure_tx(

//!         &TxChannelConfig::default()

//!             .with_clk_divider(1)

//!             .with_idle_output_level(Level::Low)

//!             .with_idle_output(false)

//!             .with_carrier_modulation(false)

//!             .with_carrier_high(1)

//!             .with_carrier_low(1)

//!             .with_carrier_level(Level::Low),

//!     )?

//!     .with_pin(peripherals.GPIO1);

//! # {after_snippet}

//! ```

//!

//! ### TX operation

//! ```rust, no_run

//! # {before_snippet}

//! # use esp_hal::delay::Delay;

//! # use esp_hal::gpio::Level;

//! # use esp_hal::rmt::{PulseCode, Rmt, TxChannelConfig, TxChannelCreator};

//! #

//! // Configure frequency based on chip type

//! let rmt = Rmt::new(peripherals.RMT, Rate::from_mhz(__freq__))?;

//!

//! let tx_config = TxChannelConfig::default().with_clk_divider(255);

//!

//! let mut channel = rmt

//!     .channel0

//!     .configure_tx(&tx_config)?

//!     .with_pin(peripherals.GPIO4);

//!

//! let delay = Delay::new();

//!

//! let mut data = [PulseCode::new(Level::High, 200, Level::Low, 50); 20];

//! data[data.len() - 2] = PulseCode::new(Level::High, 3000, Level::Low, 500);

//! data[data.len() - 1] = PulseCode::end_marker();

//!

//! loop {

//!     let transaction = channel.transmit(&data)?;

//!     channel = transaction.wait()?;

//!     delay.delay_millis(500);

//! }

//! # }

//! ```

//!

//! ### RX operation

//! ```rust, no_run

//! # {before_snippet}

//! # use esp_hal::rmt::{PulseCode, Rmt, RxChannelConfig, RxChannelCreator};

//! # use esp_hal::delay::Delay;

//! # use esp_hal::gpio::{Level, Output, OutputConfig};

//! #

//! const WIDTH: usize = 80;

//!

//! let mut out = Output::new(peripherals.GPIO5, Level::Low, OutputConfig::default());

//!

//! // Configure frequency based on chip type

//! let rmt = Rmt::new(peripherals.RMT, Rate::from_mhz(__freq__))?;

//!

//! let rx_config = RxChannelConfig::default()

//!     .with_clk_divider(1)

//!     .with_idle_threshold(10000);

//! let mut channel = rmt

//!     .__channel__

//!     .configure_rx(&rx_config)?

//!     .with_pin(peripherals.GPIO4);

//! let delay = Delay::new();

//! let mut data: [PulseCode; 48] = [PulseCode::default(); 48];

//!

//! loop {

//!     for x in data.iter_mut() {

//!         x.reset()

//!     }

//!

//!     let transaction = channel.receive(&mut data)?;

//!

//!     // Simulate input

//!     for i in 0u32..5u32 {

//!         out.set_high();

//!         delay.delay_micros(i * 10 + 20);

//!         out.set_low();

//!         delay.delay_micros(i * 20 + 20);

//!     }

//!

//!     match transaction.wait() {

//!         Ok((symbol_count, channel_res)) => {

//!             channel = channel_res;

//!             let mut total = 0usize;

//!             for entry in &data[..symbol_count] {

//!                 if entry.length1() == 0 {

//!                     break;

//!                 }

//!                 total += entry.length1() as usize;

//!

//!                 if entry.length2() == 0 {

//!                     break;

//!                 }

//!                 total += entry.length2() as usize;

//!             }

//!

//!             for entry in &data[..symbol_count] {

//!                 if entry.length1() == 0 {

//!                     break;

//!                 }

//!

//!                 let count = WIDTH / (total / entry.length1() as usize);

//!                 let c = match entry.level1() {

//!                     Level::High => '-',

//!                     Level::Low => '_',

//!                 };

//!                 for _ in 0..count + 1 {

//!                     print!("{}", c);

//!                 }

//!

//!                 if entry.length2() == 0 {

//!                     break;

//!                 }

//!

//!                 let count = WIDTH / (total / entry.length2() as usize);

//!                 let c = match entry.level2() {

//!                     Level::High => '-',

//!                     Level::Low => '_',

//!                 };

//!                 for _ in 0..count + 1 {

//!                     print!("{}", c);

//!                 }

//!             }

//!

//!             println!();

//!         }

//!         Err((_err, channel_res)) => {

//!             channel = channel_res;

//!         }

//!     }

//!

//!     delay.delay_millis(1500);

//! }

//! # }

//! ```

//!

//! > Note: on ESP32 and ESP32-S2 you cannot specify a base frequency other than 80 MHz

use core::{

    default::Default,

    marker::PhantomData,

    pin::Pin,

    task::{Context, Poll},

};

use enumset::{EnumSet, EnumSetType};

use esp_sync::RawMutex;

use portable_atomic::Ordering;

#[cfg(place_rmt_driver_in_ram)]

use procmacros::ram;

use crate::{

    Async,

    Blocking,

    asynch::AtomicWaker,

    gpio::{

        self,

        InputConfig,

        Level,

        OutputConfig,

        PinGuard,

        interconnect::{PeripheralInput, PeripheralOutput},

    },

    peripherals::{Interrupt, RMT},

    soc::clocks,

    system::GenericPeripheralGuard,

    time::Rate,

};

mod reader;

use reader::{ReaderState, RmtReader};

mod writer;

use writer::{RmtWriter, WriterState};

/// A configuration error.

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

#[non_exhaustive]

pub enum ConfigError {

    /// The desired frequency is impossible to reach.

    UnreachableTargetFrequency,

    /// The idle threshold exceeds [`MAX_RX_IDLE_THRESHOLD`].

    IdleThresholdOutOfRange,

    /// The memsize is 0 or larger than what the channel can support.

    MemsizeOutOfRange,

    /// (Part of) the requested channel memory is in use by another channel.

    MemoryBlockNotAvailable,

}

impl core::error::Error for ConfigError {}

impl core::fmt::Display for ConfigError {

    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {

        match self {

            Self::UnreachableTargetFrequency => {

                write!(f, "The desired frequency is impossible to reach")

            }

            Self::IdleThresholdOutOfRange => write!(f, "The idle threshold is out of range"),

            Self::MemsizeOutOfRange => write!(f, "The memsize is out of range"),

            Self::MemoryBlockNotAvailable => {

                write!(f, "Memory block is not available for channel")

            }

        }

    }

}

/// Errors

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

#[allow(clippy::enum_variant_names, reason = "peripheral is unstable")]

#[non_exhaustive]

pub enum Error {

    /// The amount of pulses exceeds the size of the FIFO.

    Overflow,

    /// An argument is invalid.

    InvalidArgument,

    /// An error occurred during transmission.

    TransmissionError,

    /// No transmission end marker found.

    EndMarkerMissing,

    /// The data length is invalid.

    InvalidDataLength,

    /// Receiver error most likely RMT memory overflow.

    ReceiverError,

}

impl core::error::Error for Error {}

impl core::fmt::Display for Error {

    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {

        match self {

            Self::Overflow => write!(f, "The amount of pulses exceeds the size of the FIFO"),

            Self::InvalidArgument => write!(f, "An argument is invalid"),

            Self::TransmissionError => write!(f, "An error occurred during transmission"),

            Self::EndMarkerMissing => write!(f, "No transmission end marker found"),

            Self::InvalidDataLength => write!(f, "The data length is invalid"),

            Self::ReceiverError => write!(f, "Receiver error most likely RMT memory overflow"),

        }

    }

}

/// Convenience newtype to work with pulse codes.

///

/// A [`PulseCode`] is represented as `u32`, with fields laid out as follows:

///

/// | Bit 31   | Bits 30-16 | Bit 15   | Bits 14-0 |

/// |----------|------------|----------|-----------|

/// | `level2` | `length2`  | `level1` | `length1` |

///

/// Here, `level1` / `length1` correspond to the signal that is send/received first,

/// and the signal with `level2` / `length2` is send/received afterwards.

///

/// If `length1` or `length2` are zero, this implies an end marker and transmission will

/// stop with the corresponding signal.

#[derive(Clone, Copy, Default, Eq, PartialEq)]

#[repr(transparent)]

pub struct PulseCode(pub u32);

// Pre-compute some constants to make it obvious that the code below doesn't mix up both halves of

// a PulseCode.

const LENGTH1_SHIFT: usize = 0;

const LEVEL1_SHIFT: usize = 15;

const LENGTH2_SHIFT: usize = 16;

const LEVEL2_SHIFT: usize = 31;

const LENGTH_MASK: u32 = 0x7FFF;

const LENGTH1_MASK: u32 = LENGTH_MASK << LENGTH1_SHIFT;

const LENGTH2_MASK: u32 = LENGTH_MASK << LENGTH2_SHIFT;

const LEVEL1_MASK: u32 = 1 << LEVEL1_SHIFT;

const LEVEL2_MASK: u32 = 1 << LEVEL2_SHIFT;

impl PulseCode {

    /// Maximum value for the `length1` and `length2` fields.

    pub const MAX_LEN: u16 = 0x7FFF;

    /// Creates a new instance.

    ///

    /// Panics if `length1` or `length2` exceed the maximum representable range.

    #[inline]

    pub const fn new(level1: Level, length1: u16, level2: Level, length2: u16) -> Self {

        if length1 > Self::MAX_LEN || length2 > Self::MAX_LEN {

            // defmt::panic! fails const eval

            core::panic!("PulseCode length out of range");

        };

        // SAFETY:

        // - We just checked that length1 and length2 are in range

        unsafe { Self::new_unchecked(level1, length1, level2, length2) }

    }

    /// Creates a new instance.

    ///

    /// If `length1` or `length2` exceed the maximum representable range, they

    /// will be clamped to `Self::MAX_LEN`.

    #[inline]

    pub const fn new_clamped(level1: Level, length1: u16, level2: Level, length2: u16) -> Self {

        // Can't use lengthX.min(Self::MAX_LEN) since it is not const

        let length1 = if length1 > Self::MAX_LEN {

            Self::MAX_LEN

        } else {

            length1

        };

        let length2 = if length2 > Self::MAX_LEN {

            Self::MAX_LEN

        } else {

            length2

        };

        // SAFETY:

        // - We just clamped length1 and length2 to the required intervals

        unsafe { Self::new_unchecked(level1, length1, level2, length2) }

    }

    /// Creates a new instance, attempting to convert lengths to `u16` first.

    ///

    /// This is slightly more convenient when passing in longer integers (e.g. `u32`) resulting from

    /// a preceding calculation.

    ///

    /// If `length1` or `length2` fail to convert to `u16` or exceed the maximum representable

    /// range, this will return `None`.

    #[inline]

    pub fn try_new(

        level1: Level,

        length1: impl TryInto<u16>,

        level2: Level,

        length2: impl TryInto<u16>,

    ) -> Option<Self> {

        let (Ok(length1), Ok(length2)) = (length1.try_into(), length2.try_into()) else {

            return None;

        };

        if length1 > Self::MAX_LEN || length2 > Self::MAX_LEN {

            return None;

        }

        // SAFETY:

        // - We just checked that length1 and length2 are in range

        Some(unsafe { Self::new_unchecked(level1, length1, level2, length2) })

    }

    /// Creates a new instance without checking that code lengths are in range.

    ///

    /// # Safety

    ///

    /// `length1` and `length2` must be 15-bit wide, i.e. their MSB must be cleared.

    #[inline]

    pub const unsafe fn new_unchecked(

        level1: Level,

        length1: u16,

        level2: Level,

        length2: u16,

    ) -> Self {

        Self(

            (level1.const_into() as u32) << LEVEL1_SHIFT

                | (level2.const_into() as u32) << LEVEL2_SHIFT

                | (length1 as u32) << LENGTH1_SHIFT

                | (length2 as u32) << LENGTH2_SHIFT,

        )

    }

    /// Creates a new instance that is an end marker with `Level::Low`.

    ///

    /// This corresponds to the all-zero [`PulseCode`], i.e. with both level and

    /// length fields set to zero, equivalent to (but more semantic than)

    /// `PulseCode::from(0u32)` and [`PulseCode::default()`].

    // FIXME: Consider adding a variant with `level1`, `length1` and `level2` arguments

    // which sets `length2 = 0` so that it is still guaranteed to return an end

    // marker.

    #[inline]

    pub const fn end_marker() -> Self {

        Self(0)

    }

    /// Sets all levels and lengths to 0.

    ///

    /// In other words, assigns the value of [`PulseCode::end_marker()`] to `self`.

    #[inline]

    pub fn reset(&mut self) {

        self.0 = 0

    }

    /// Logical output level in the first pulse code interval

    #[inline]

    pub const fn level1(self) -> Level {

        let level = (self.0 >> LEVEL1_SHIFT) & 1;

        Level::const_from(0 != level)

    }

    /// Logical output level in the second pulse code interval

    #[inline]

    pub const fn level2(self) -> Level {

        let level = (self.0 >> LEVEL2_SHIFT) & 1;

        Level::const_from(0 != level)

    }

    /// Length of the first pulse code interval (in clock cycles)

    #[inline]

    pub const fn length1(self) -> u16 {

    }

    /// Length of the second pulse code interval (in clock cycles)

    #[inline]

    pub const fn length2(self) -> u16 {

    }

    /// Sets `level1` and returns the modified [`PulseCode`].

    #[inline]

    pub const fn with_level1(mut self, level: Level) -> Self {

        self.0 &= !LEVEL1_MASK;

        self.0 |= (level.const_into() as u32) << LEVEL1_SHIFT;

        self

    }

    /// Sets `level2` and returns the modified [`PulseCode`].

    #[inline]

    pub const fn with_level2(mut self, level: Level) -> Self {

        self.0 &= !LEVEL2_MASK;

        self.0 |= (level.const_into() as u32) << LEVEL2_SHIFT;

        self

    }

    /// Sets `length1` and returns the modified [`PulseCode`].

    ///

    /// Returns `None` if `length` exceeds the representable range.

    #[inline]

    pub const fn with_length1(mut self, length: u16) -> Option<Self> {

        if length > Self::MAX_LEN {

            return None;

        }

        self.0 &= !LENGTH1_MASK;

        self.0 |= (length as u32) << LENGTH1_SHIFT;

        Some(self)

    }

    /// Sets `length2` and returns the modified [`PulseCode`].

    ///

    /// Returns `None` if `length` exceeds the representable range.

    #[inline]

    pub const fn with_length2(mut self, length: u16) -> Option<Self> {

        if length > Self::MAX_LEN {

            return None;

        }

        self.0 &= !LENGTH2_MASK;

        self.0 |= (length as u32) << LENGTH2_SHIFT;

        Some(self)

    }

    /// Returns whether this pulse code contains an end marker.

    ///

    /// Equivalent to `self.length1() == 0 || self.length2() == 0`.

    #[inline]

    pub const fn is_end_marker(self) -> bool {

    }

    #[inline]

    fn symbol1(self) -> char {

        if self.level1().into() { 'H' } else { 'L' }

    }

    #[inline]

    fn symbol2(self) -> char {

        if self.level2().into() { 'H' } else { 'L' }

    }

}

impl core::fmt::Debug for PulseCode {

    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {

        write!(

            f,

            "PulseCode({} {}, {} {})",

            self.symbol1(),

            self.length1(),

            self.symbol2(),

            self.length2(),

        )

    }

}

#[cfg(feature = "defmt")]

impl defmt::Format for PulseCode {

    fn format(&self, fmt: defmt::Formatter<'_>) {

        defmt::write!(

            fmt,

            "PulseCode({} {}, {} {})",

            self.symbol1(),

            self.length1(),

            self.symbol2(),

            self.length2(),

        )

    }

}

impl From<u32> for PulseCode {

    #[inline]

    fn from(value: u32) -> Self {

        Self(value)

    }

}

impl From<PulseCode> for u32 {

    #[inline]

    fn from(code: PulseCode) -> u32 {

        code.0

    }

}

/// Memory size associated to a channel.

///

/// This is a newtype around the number of blocks as u8, thus not requiring any

/// extra space. However, it is useful to abstract memory sizes into their own

/// type to make explicit whether they refer to a number of RAM blocks or a

/// number of pulse codes and to centralize conversion between both.

#[derive(Copy, Clone)]

struct MemSize(u8);

impl MemSize {

    /// Creates from the given number of RMT RAM blocks.

    #[inline]

    const fn from_blocks(blocks: u8) -> Self {

        Self(blocks)

    }

    /// Returns the number of RMT RAM blocks specified by this `MemSize`.

    #[inline]

    const fn blocks(self) -> u8 {

        self.0

    }

    /// Returns the number of RMT pulse codes specified by this `MemSize`.

    #[inline]

    const fn codes(self) -> usize {

    }

}

/// Marker for a channel capable of or configured for transmit operations.

#[derive(Clone, Copy, Debug)]

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

pub struct Tx;

/// Marker for a channel capable of or configured for receive operations.

#[derive(Clone, Copy, Debug)]

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

pub struct Rx;

/// A trait implemented by the `Rx` and `Tx` marker structs.

///

/// For internal use by the driver.

pub trait Direction: Copy + Clone + core::fmt::Debug + crate::private::Sealed + Unpin {

    #[doc(hidden)]

    const IS_TX: bool;

}

impl crate::private::Sealed for Tx {}

impl crate::private::Sealed for Rx {}

impl Direction for Tx {

    const IS_TX: bool = true;

}

impl Direction for Rx {

    const IS_TX: bool = false;

}

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

struct DynChannelAccess<Dir: Direction> {

    ch_idx: ChannelIndex,

}

impl<Dir: Direction> DynChannelAccess<Dir> {

    #[inline]

    unsafe fn conjure(ch_idx: ChannelIndex) -> Self {

        Self {

            ch_idx,

            _direction: PhantomData,

        }

    }

}

/// Channel configuration for TX channels

#[derive(Debug, Copy, Clone, procmacros::BuilderLite)]

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

pub struct TxChannelConfig {

    /// Channel's clock divider

    clk_divider: u8,

    /// Whether the idle output level is low/high.

    idle_output_level: Level,

    /// Whether idle output is enabled.

    idle_output: bool,

    /// Whether carrier modulation is enabled.

    carrier_modulation: bool,

    /// Carrier high phase in ticks

    carrier_high: u16,

    /// Carrier low phase in ticks

    carrier_low: u16,

    /// Level of the carrier

    carrier_level: Level,

    /// The amount of memory blocks allocated to this channel.

    memsize: u8,

}

impl Default for TxChannelConfig {

    fn default() -> Self {

        Self {

            clk_divider: Default::default(),

            idle_output_level: Level::Low,

            idle_output: Default::default(),

            carrier_modulation: Default::default(),

            carrier_high: Default::default(),

            carrier_low: Default::default(),

            carrier_level: Level::Low,

            memsize: 1,

        }

    }

}

/// Channel configuration for RX channels

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

pub struct RxChannelConfig {

    /// Channel's clock divider

    clk_divider: u8,

    /// Whether carrier demodulation is enabled.

    carrier_modulation: bool,

    /// Carrier high phase in ticks

    carrier_high: u16,

    /// Carrier low phase in ticks

    carrier_low: u16,

    /// Level of the carrier

    carrier_level: Level,

    /// Filter threshold in ticks

    filter_threshold: u8,

    /// Idle threshold in ticks, must not exceed [`MAX_RX_IDLE_THRESHOLD`].

    idle_threshold: u16,

    /// The amount of memory blocks allocated to this channel.

    memsize: u8,

}

impl Default for RxChannelConfig {

    fn default() -> Self {

        Self {

            clk_divider: Default::default(),

            carrier_modulation: Default::default(),

            carrier_high: Default::default(),

            carrier_low: Default::default(),

            carrier_level: Level::Low,

            filter_threshold: Default::default(),

            idle_threshold: Default::default(),

            memsize: 1,

        }

    }

}

// Channel specification

// Looping all channels: Build up the Rmt struct and compute NUM_CHANNELS

for_each_rmt_channel!(

    (all $(($num:literal)),+) => {

        paste::paste! {

            /// RMT Instance

            pub struct Rmt<'rmt, Dm>

            where

                Dm: crate::DriverMode,

            {

                peripheral: RMT<'rmt>,

                frequency: Rate,

                $(

                    #[doc = concat!("RMT Channel ", $num)]

                    pub [<channel $num>]: ChannelCreator<'rmt, Dm, $num>,

                )+

                _mode: PhantomData<Dm>,

            }

            impl<'rmt, Dm> Rmt<'rmt, Dm>

            where

                Dm: crate::DriverMode,

            {

                fn create(peripheral: RMT<'rmt>, frequency: Rate) -> Self {

                    Self {

                        peripheral,

                        frequency,

                        $(

                            [<channel $num>]: ChannelCreator::conjure(),

                        )+

                        _mode: PhantomData,

                    }

                }

                /// Returns the configured RMT counter clock frequency.

                ///

                /// This is the actual frequency after the global RMT clock divider has been

                /// configured. Pulse code lengths are expressed in cycles of

                /// this clock divided by the channel divider configured with

                /// [`TxChannelConfig::with_clk_divider`] or [`RxChannelConfig::with_clk_divider`].

                pub fn frequency(&self) -> Rate {

                    self.frequency

                }

            }

            impl<'rmt> Rmt<'rmt, Blocking> {

                /// Reconfigures the driver for asynchronous operation.

                pub fn into_async(mut self) -> Rmt<'rmt, Async> {

                    self.set_interrupt_handler(chip_specific::async_interrupt_handler);

                    Rmt {

                        peripheral: self.peripheral,

                        frequency: self.frequency,

                        $(

                            [<channel $num>]: unsafe { self.[<channel $num>].into_async() },

                        )+

                        _mode: PhantomData,

                    }

                }

            }

            #[allow(clippy::no_effect)]

            const NUM_CHANNELS: usize = const { 0 $( + {$num; 1} )+ };

        }

    };

    // Looping channel indices: Declare input/output signals and ChannelIndex

    // The number of Rx and Tx channels is identical for all chips.

    (tx $(($num:literal, $idx:literal)),+) => {

        paste::paste! {

            // Enum of valid channel indices: For the given chip, tx/rx channels for all of these indices

            // exist. (Note that channel index == channel number for esp32 and esp32s2, but not for other

            // chips.)

            //

            // This type is useful to inform the compiler of possible values of an u8 (i.e. we use this as

            // homemade refinement type) which allows it to elide bounds checks in register/field

            // accessors of the PAC even when using DynChannelAccess.

            //

            // Cf. https://github.com/rust-lang/rust/issues/109958 regarding rustc's capabilities here.

            #[doc(hidden)]

            #[cfg_attr(feature = "defmt", derive(defmt::Format))]

            #[repr(u8)]

            #[allow(unused)]

            pub enum ChannelIndex {

                $(

                    [<Ch $idx>] = $idx,

                )+

            }

            impl ChannelIndex {

                #[allow(clippy::no_effect)]

                const MAX: u8 = const { 0 $( + {$idx; 1} )+ };

            }

            const OUTPUT_SIGNALS: [gpio::OutputSignal; ChannelIndex::MAX as usize] = [

                $(

                    gpio::OutputSignal::[<RMT_SIG_ $idx>],

                )+

            ];

            $(

                impl<'ch, Dm> TxChannelCreator<'ch, Dm> for ChannelCreator<'ch, Dm, $num>

                where

                    Dm: crate::DriverMode,

                {

                    fn configure_tx(

                        self,

                        config: &TxChannelConfig,

                    ) -> Result<Channel<'ch, Dm, Tx>, ConfigError> {

                        let raw = unsafe { DynChannelAccess::conjure(ChannelIndex::[<Ch $idx>]) };

                        apply_tx_config(raw, config, false)?;

                        Ok(Channel {

                            raw,

                            _rmt: core::marker::PhantomData,

                            _pin_guard: PinGuard::new_unconnected(),

                            _mem_guard: MemoryGuard::new(raw),

                            _guard: self._guard,

                        })

                    }

                }

            )+

        }

    };

    (rx $(($num:literal, $idx:literal)),+) => {

        paste::paste! {

            const INPUT_SIGNALS: [gpio::InputSignal; ChannelIndex::MAX as usize] = [

                $(

                    gpio::InputSignal::[<RMT_SIG_ $idx>],

                )+

            ];

            $(

                impl<'ch, Dm> RxChannelCreator<'ch, Dm> for ChannelCreator<'ch, Dm, $num>

                where

                    Dm: crate::DriverMode,

                {

                    fn configure_rx(

                        self,

                        config: &RxChannelConfig,

                    ) -> Result<Channel<'ch, Dm, Rx>, ConfigError> {

                        let raw = unsafe { DynChannelAccess::conjure(ChannelIndex::[<Ch $idx>]) };

                        Ok(Channel {

                            raw,

                            _rmt: core::marker::PhantomData,

                            _pin_guard: PinGuard::new_unconnected(),

                            _mem_guard: MemoryGuard::new(raw),

                            _guard: self._guard,

                        })

                }

            )+

        }

    };

);

struct ChannelIndexIter(u8);

impl Iterator for ChannelIndexIter {

    type Item = ChannelIndex;

    fn next(&mut self) -> Option<Self::Item> {

        let ch_idx = self.0;

        if ch_idx < ChannelIndex::MAX {

            self.0 = ch_idx + 1;

            Some(unsafe { ChannelIndex::from_u8_unchecked(ch_idx) })

        } else {

            None

        }

    }

}

impl ChannelIndex {

    fn iter_all() -> ChannelIndexIter {

        ChannelIndexIter(0)

    }

    unsafe fn from_u8_unchecked(ch_idx: u8) -> Self {

        debug_assert!(ch_idx < ChannelIndex::MAX);

        unsafe { core::mem::transmute(ch_idx) }

    }

}

impl<'rmt> Rmt<'rmt, Blocking> {

    /// Creates a new RMT instance.

    ///

    /// The `frequency` parameter configures the global RMT counter clock. Use

    /// [`Rmt::frequency`] to retrieve the actual configured frequency when

    /// converting real-time pulse durations to [`PulseCode`] lengths; this is

    /// not necessarily the APB clock frequency.

    ///

    /// # Errors

    ///

    /// [`ConfigError::UnreachableTargetFrequency`] when the target frequency cannot be reached.

        let clk_src = ClockSource::default();

        let (div, counter_frequency) = self::chip_specific::validate_clock(clk_src, frequency)?;

        // Only create the peripheral guards after validate_clock() to avoid that this function

        // contains lots of code to drop them again on error.

        let this = Rmt::create(peripheral, counter_frequency);

        self::chip_specific::configure_clock(clk_src, div, counter_frequency);

    /// Registers an interrupt handler for the RMT peripheral.

    ///

    /// Replaces any previously registered interrupt handlers.

    #[instability::unstable]

    pub fn set_interrupt_handler(&mut self, handler: crate::interrupt::InterruptHandler) {

        for core in crate::system::Cpu::other() {

            crate::interrupt::disable(core, Interrupt::RMT);

        }

        crate::interrupt::bind_handler(Interrupt::RMT, handler);

    }

}

impl crate::private::Sealed for Rmt<'_, Blocking> {}

#[instability::unstable]

impl crate::interrupt::InterruptConfigurable for Rmt<'_, Blocking> {

    fn set_interrupt_handler(&mut self, handler: crate::interrupt::InterruptHandler) {

        self.set_interrupt_handler(handler);

    }

}

// Mark the channel as used and reserve the channel RAM.

//

// If this is not possible (because a preceding channel is using the RAM, or

// because subsequent channels are in use so that we can't reserve the RAM),

// restore all state and return with an error.

#[inline(never)]

    channel: u8,

    state: RmtState,

    memsize: MemSize,

) -> Result<(), ConfigError> {

        return Err(ConfigError::MemsizeOutOfRange);

    }

    let mut next_state = state;

    for cur_channel in channel..channel + memsize.blocks() {

        if RmtState::compare_exchange(

            cur_channel,

            RmtState::Unconfigured,

            next_state,

            Ordering::Acquire,

            Ordering::Relaxed,

        )

        .is_err()

        {

            RmtState::store_range_rev(

                RmtState::Unconfigured,

                channel..cur_channel,

                Ordering::Relaxed,

            );

            return Err(ConfigError::MemoryBlockNotAvailable);

        }

        // Set the first channel to `state` (`Rx`|`Tx`), the remaining (if any) to

        // `Reserved`

        next_state = RmtState::Reserved;

    }

    Ok(())

#[inline(never)]

    let channel = raw.channel();

    let memsize = raw.memsize().blocks();

    raw.set_memsize(MemSize::from_blocks(0));

    RmtState::store_range_rev(

        RmtState::Unconfigured,

        Ordering::Release,

    );

// We store values of type `RmtState` in the global `STATE`. However, we also need atomic access,

// thus the enum needs to be represented as AtomicU8. Thus, we end up with unsafe conversions

// between `RmtState` and `u8` to avoid constant range checks.

// This submodule wraps all accesses in a safe API which ensures that only valid enum values can

// be stored to `STATE` such that other code in this driver does not need to be concerned with

// these details.

mod state {

    use core::ops::Range;

    use portable_atomic::{AtomicU8, Ordering};

    use super::{Direction, DynChannelAccess, NUM_CHANNELS};

    static STATE: [AtomicU8; NUM_CHANNELS] =

        [const { AtomicU8::new(RmtState::Unconfigured as u8) }; NUM_CHANNELS];

    #[derive(Copy, Clone, PartialEq, Eq)]

    #[repr(u8)]

    pub(super) enum RmtState {

        // The channel is not configured for either rx or tx, and its memory is available

        Unconfigured,

        // The channels is not in use, but one of the preceding channels is using its memory

        Reserved,

        // The channel is configured for rx

        Rx,

        // The channel is configured for tx

        Tx,

    }

    impl RmtState {

        /// Returns whether this state corresponds to a rx, tx, or other configuration.

        #[allow(unused)]

        #[inline]

        pub(super) fn is_tx(&self) -> Option<bool> {

            match self {

                Self::Rx => Some(false),

                Self::Tx => Some(true),

                _ => None,

            }

        }

        /// Converts a `u8` to `Self` without checking that it has a valid value for the enum.

        ///

        /// # Safety

        ///

        /// - Must only be called with valid values of the RmtState discriminant

        #[allow(unused)]

        #[inline]

        unsafe fn from_u8_unchecked(value: u8) -> Self {

            unsafe { core::mem::transmute::<_, Self>(value) }

        }

        /// Loads channel state from the global `STATE` by channel index.

        ///

        /// # Safety

        ///

        /// - the `channel` number must be in 0..NUM_CHANNELS

        #[allow(unused)]

        #[inline]

        pub(super) unsafe fn load_by_channel_number(channel: u8, ordering: Ordering) -> Self {

            unsafe { Self::from_u8_unchecked(STATE[channel as usize].load(ordering)) }

        }

        /// Stores the given state to all channel states for an index range in reverse order.

        #[inline]

        pub(super) fn store_range_rev(self, range: Range<u8>, ordering: Ordering) {

            for ch_num in range.rev() {

            }

        }

        /// Stores channel state to the global `STATE` given a `DynChannelAccess`.

        #[allow(unused)]

        #[inline]

        pub(super) fn store<Dir: Direction>(self, raw: DynChannelAccess<Dir>, ordering: Ordering) {

            STATE[raw.channel() as usize].store(self as u8, ordering);

        }

        /// Loads channel state from the global `STATE` given a `DynChannelAccess`.

        #[allow(unused)]

        #[inline]

        pub(super) fn load<Dir: Direction>(raw: DynChannelAccess<Dir>, ordering: Ordering) -> Self {

            // SAFETY: The only implementations of RawChannelAccess are in this module and can only

            // be (safely) constructed using valid channel numbers.

            unsafe { Self::load_by_channel_number(raw.channel(), ordering) }

        }

        /// Performs a compare_exchange on the global `STATE` by channel index.

        #[inline]

        pub(super) fn compare_exchange(

            ch_num: u8,

            current: Self,

            new: Self,

            success: Ordering,

            failure: Ordering,

        ) -> Result<Self, Self> {

                .compare_exchange(current as u8, new as u8, success, failure)

                .map(|prev| unsafe { Self::from_u8_unchecked(prev) })

                .map_err(|prev| unsafe { Self::from_u8_unchecked(prev) })

        }

    }

}

use state::RmtState;

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

struct RmtClockGuard;

impl RmtClockGuard {

    fn new() -> Self {

        #[cfg(soc_has_clock_node_rmt_sclk)]

        clocks::ClockTree::with(|clocks| {

            }

        });

        Self

    }

}

impl Drop for RmtClockGuard {

        #[cfg(soc_has_clock_node_rmt_sclk)]

}

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

struct ChannelGuards {

    _peripheral: GenericPeripheralGuard<{ crate::system::Peripheral::Rmt as u8 }>,

}

impl ChannelGuards {

        Self {

            _peripheral: GenericPeripheralGuard::new(),

            _clock: RmtClockGuard::new(),

        }

}

/// RMT Channel.

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

#[non_exhaustive]

pub struct Channel<'ch, Dm, Dir>

where

    Dm: crate::DriverMode,

    Dir: Direction,

{

    raw: DynChannelAccess<Dir>,

    // Holds the lifetime for which have unique access to both the channel and the pin its

    // configured for. Conceptually, for 'ch, we keep the Rmt peripheral alive.

    _pin_guard: PinGuard,

    // Only the "outermost" Channel/ChannelCreator holds these guards, which avoids constant

    // inc/dec of the reference counts on reborrow and drop.

}

// The reborrowing API treats Channel similar to a smart pointer: Ensure that it's size is actually

// in line with that notion.

const _: () = if core::mem::size_of::<Channel<'static, Blocking, Tx>>() > 4 {

    core::panic!("Channel growing too large!");

};

/// Per-channel size of the RMT hardware buffer (number of `PulseCode`s).

pub const CHANNEL_RAM_SIZE: usize = property!("rmt.channel_ram_size");

/// Whether the channel supports wrapping rx (wrapping tx is supported on all devices)

pub const HAS_RX_WRAP: bool = property!("rmt.has_rx_wrap");

#[inline(never)]

fn apply_tx_config(

    raw: DynChannelAccess<Tx>,

    config: &TxChannelConfig,

    reconfigure: bool,

) -> Result<(), ConfigError> {

    let memsize = MemSize::from_blocks(config.memsize);

    if reconfigure {

        release_channel_memory(raw);

    }

    reserve_channel_memory(raw.channel(), RmtState::Tx, memsize)?;

    raw.set_divider(config.clk_divider);

    raw.set_tx_carrier(

        config.carrier_modulation,

        config.carrier_high,

        config.carrier_low,

        config.carrier_level,

    );

    raw.set_tx_idle_output(config.idle_output, config.idle_output_level);

    raw.set_memsize(memsize);

    Ok(())

}

#[inline(never)]

    raw: DynChannelAccess<Rx>,

    config: &RxChannelConfig,

    reconfigure: bool,

) -> Result<(), ConfigError> {

    #[cfg_attr(any(esp32, esp32s2), allow(clippy::absurd_extreme_comparisons))]

        return Err(ConfigError::IdleThresholdOutOfRange);

    }

    }

    raw.set_rx_carrier(

        config.carrier_modulation,

        config.carrier_high,

        config.carrier_level,

    );

    raw.set_rx_idle_threshold(config.idle_threshold);

    raw.set_memsize(memsize);

    Ok(())

#[cfg_attr(feature = "defmt", derive(defmt::Format))]

struct MemoryGuard<Dir: Direction> {

    raw: Option<DynChannelAccess<Dir>>,

}

impl<Dir: Direction> MemoryGuard<Dir> {

    fn new(raw: DynChannelAccess<Dir>) -> Self {

        Self {

            raw: Some(raw),

            _dir: PhantomData,

        }

    }

    fn new_empty() -> Self {

        Self {

            raw: None,

            _dir: PhantomData,

        }

    }

}

impl<Dir: Direction> Drop for MemoryGuard<Dir> {

    fn drop(&mut self) {

        }

    }

}

impl<Dm, Dir> Channel<'_, Dm, Dir>

where

    Dm: crate::DriverMode,

    Dir: Direction,

{

    /// Reborrows this channel for a shorter lifetime `'a`.

    pub fn reborrow<'a>(&'a mut self) -> Channel<'a, Dm, Dir> {

        Channel {

            raw: self.raw,

            _rmt: self._rmt,

            // Resources must only be released once the parent is dropped.

            _pin_guard: PinGuard::new_unconnected(),

            _mem_guard: MemoryGuard::new_empty(),

            _guard: None,

        }

    }

}

impl<'ch, Dm> Channel<'ch, Dm, Tx>

where

    Dm: crate::DriverMode,

{

    /// Connects a pin to the channel's output signal.

    ///

    /// This will replace previous pin assignments for this signal.

    pub fn with_pin(mut self, pin: impl PeripheralOutput<'ch>) -> Self {

        let pin = pin.into();

        // Make sure to not cause a pulse between enabling the output and connecting it.

        let (_, level) = self.raw.tx_idle_output();

        pin.set_output_high(level.into());

        pin.apply_output_config(&OutputConfig::default());

        pin.set_output_enable(true);

        self._pin_guard = pin.connect_with_guard(self.raw.output_signal());

        self

    }

    /// Changes the configuration.

    ///

    /// # Errors